Andrew W Metz

20080024055, Jan 31, 2008

Mar 22, 2007

11/726624

Tobin Marks - Evanston IL, US
Jun Ni - Quincy MA, US
Anchuan Wang - San Jose CA, US
Yu Yang - Santa Clara CA, US
Andrew Metz - Beaverton OR, US
Shu Jin - Shanghai, CN
Lian Wang - Lowell MA, US

H01L 51/54
B29C 71/02
B32B 17/06
B32B 9/04
C07F 3/06
C23C 16/40
H01B 1/08

313504000, 106287190, 148705000, 252519500, 264346000, 428001100, 428220000, 428432000, 428702000, 556130000

Transparent conducting oxide thin films having a reduced indium content and/or an increased tin content are provided. In addition, processes for producing the same, precursors for producing the same, and transparent electroconductive substrate for display panels and organic electroluminescence devices, both including the transparent conducting oxide thin films, are provided.

20100216310, Aug 26, 2010

Feb 20, 2009

12/390263

Andrew W. METZ - Loudonville NY, US
Shuhei OGAWA - Rensselaer NY, US
Vaidyanathan BALASUBRAMANIAM - Albany NY, US
Masaru NISHINO - Halfmoon NY, US

TOKYO ELECTRON LIMITED - Tokyo

H01L 21/31
H01L 21/302

438694, 438717, 257E21214, 257E2124

A method of dry developing an anti-reflective coating (ARC) layer on a substrate is described. The method comprises disposing a substrate comprising a multi-layer mask in a plasma processing system, wherein the multi-layer mask comprises a lithographic layer overlying a silicon-containing ARC layer and wherein the lithographic layer comprises a feature pattern formed therein using a lithographic process. The method further comprises: introducing a process gas to the plasma processing system according to a process recipe, the process gas comprising a nitrogen-containing gas, a hydrogen-containing gas, and a CHF-containing gas, wherein x, y, and z are integers greater than or equal to unity; forming plasma from the process gas in the plasma processing system according to the process recipe; and exposing the substrate to the plasma in order to transfer the feature pattern in the lithographic layer to the underlying silicon-containing ARC layer.

20220392765, Dec 8, 2022

Jun 4, 2021

17/339495

- Tokyo, JP
Caitlin Philippi - Albany NY, US
Andrew Metz - Albany NY, US
Alok Ranjan - Austin TX, US

H01L 21/02
C23C 16/32
C23C 16/42

A method for processing a substrate includes performing a cyclic plasma process including a plurality of cycles, each cycle of the plurality of cycles including purging a plasma processing chamber including the substrate with a first deposition gas including carbon. The substrate includes a first layer including silicon and a second layer including a metal oxide. The method further includes exposing the substrate to a first plasma generated from the first deposition gas to selectively deposit a first polymeric film over the first layer relative to the second layer; purging the plasma processing chamber with an etch gas including fluorine; and exposing the substrate to a second plasma generated from the etch gas to etch the second layer.

20220384199, Dec 1, 2022

Apr 15, 2022

17/721620

- Tokyo, JP
Andrew METZ - Albany NY, US
Peter BIOLSI - New Windsor NY, US

TOKYO ELECTRON LIMITED - Tokyo

H01L 21/3065
H01L 21/311
H01L 21/768
H01L 21/02

A method which includes providing a substrate having a source/drain region and an etch stop layer on the source/drain region. A plasma etching process is performed using an etching gas that removes the etch stop layer and forms a sacrificial oxide capping layer on the source/drain region. The sacrificial oxide capping layer is then from the source/drain region.

20220375759, Nov 24, 2022

May 21, 2021

17/327305

- Tokyo, JP
Du Zhang - Albany NY, US
Shihsheng Chang - Albany NY, US
Mingmei Wang - Albany NY, US
Andrew Metz - Albany NY, US

H01L 21/311
H01J 37/32

A method for processing a substrate includes performing a cyclic process including a plurality of cycles, where the cyclic process includes: forming, in a plasma processing chamber, a passivation layer over sidewalls of a recess in a carbon-containing layer, by exposing the substrate to a first gas including boron, silicon, or aluminum, the carbon-containing layer being disposed over a substrate, purging the plasma processing chamber with a second gas including a hydrogen-containing gas, an oxygen-containing gas, or molecular nitrogen, and exposing the substrate to a plasma generated from the second gas, where each cycle of the plurality of cycles extends the recess vertically into the carbon-containing layer.

20220344162, Oct 27, 2022

Apr 14, 2022

17/721014

- Tokyo, JP
Alok RANJAN - Austin TX, US
Peter VENTZEK - Austin TX, US
Andrew METZ - Albany NY, US
Hiroaki NIIMI - Cohoes NY, US

TOKYO ELECTRON LIMITED - Tokyo

H01L 21/285
H01L 21/02
H01L 29/45
H01L 29/78
H01L 29/66

A method for manufacturing a FET semiconductor structure includes providing a substrate comprising at least one source/drain contact of at least one FET, the at least one source/drain contact formed adjacent to a dummy gate of the at least one FET. A TiSifilm with C54 structure is selectively deposited directly on and fully covering the at least one source/drain contact relative to a vertical sidewall of a gate spacer between the at least one source/drain contact and the dummy gate. The dummy gate is replaced with a replacement metal gate.

20220344169, Oct 27, 2022

Apr 19, 2022

17/724088

- Tokyo, JP
David L. O'MEARA - Albany NY, US
Cheryl ALIX - Albany NY, US
Andrew METZ - Albany NY, US
Shan HU - Albany NY, US
Henan ZHANG - Albany NY, US

Tokyo Electron Limited - Tokyo

H01L 21/311
H01L 21/768
H01L 21/02

A method includes providing a substrate including metal gate stacks and source/drain contact regions in alternating arrangement along a surface of the substrate with a dielectric spacer separating each source/drain contact region from adjacent metal gate stacks. Each source/drain region is recessed within an opening between adjacent metal gate stacks such that source/drain contact regions provide a bottom of the recess and dielectric spacers provide sidewalls. The etch stop layer is formed on the substrate such that it conformally covers the metal gate stacks, the sidewalls and the bottom of each recess, and a sacrificial layer is formed over each of the metal gate stacks and on at least a portion of each sidewall. The etch stop layer is removed from the bottom of each recess to expose the source/drain contact, and the sacrificial layer is then removed from the metal gate stacks and the sidewalls of each recess.

20220262679, Aug 18, 2022

Feb 17, 2021

17/177379

- Tokyo, JP
Lior Huli - Albany NY, US
Andrew Metz - Albany NY, US
Angelique Raley - Albany NY, US

H01L 21/768
H01L 21/311
H01L 21/3105

Methods and improved process flows are provided herein for forming self-aligned contacts using spin-on silicon carbide (SiC). More specifically, the disclosed methods and process flows form self-aligned contacts by using spin-on SiC as a cap layer for at least one other structure, instead of depositing a SiC layer via plasma vapor deposition (PVD), chemical vapor deposition (CVD), atomic layer deposition (ALD), etc. The other structure may be a source and drain contact made through the use of a trench conductor. By utilizing spin-on SiC as a cap layer material, the disclosed methods and process flows avoid problems that typically occur when SiC is deposited, for example by CVD, and subsequently planarized. As such, the disclosed methods and process flows improve upon conventional methods and process flows for forming self-aligned contacts by reducing defectivity and improving yield.