Giang Ao Nguyen

20090077441, Mar 19, 2009

Sep 14, 2007

11/855345

Duy Quoc Huynh - Cedar Park TX, US
Gahn Wattanadilok Krishnakalin - Austin TX, US
Giang Chau Nguyen - Austin TX, US

G06F 11/00

714741, 714E11001

A computer implemented method, apparatus and computer program product for extending test coverage in a simulated multiple core integrated circuit. The simulator applies at a first time a first test vector on the simulated multiple core integrated circuit, the first test vector having a duration. The simulator may also apply a second test vector at a second time before the duration but substantially after the first time. The simulator can collect a response from the multiple core integrated circuit based on the first test vector and the second test vector.

20120032716, Feb 9, 2012

Sep 19, 2011

13/236340

Robert Michael Dinkjian - Austin TX, US
Giang Chau Nguyen - Austin TX, US
James Mitchell Rakes - Austin TX, US

INTERNATIONAL BUSINESS MACHINES CORPORATION - Armonk NY

H03L 7/00

327142

Methods, systems, and computer program products for initializing one or more components of a system, the system comprising an integrated circuit that comprises at least one processor, are disclosed. A method includes initializing at least one component of the system, determining a temperature of the integrated circuit using a temperature sensing device embedded on the integrated circuit, comparing the determined temperature to a predetermined suitable temperature operating range of at least one additional component to yield a comparison result, and initializing the at least one additional component based on the comparison result. The at least one additional component may be initialized on the condition that the determined temperature of the integrated circuit is within the predetermined suitable temperature operating range of the at least one additional component.

20210014719, Jan 14, 2021

Jul 7, 2020

16/922928

Ha Nguyen - Irvine CA, US
Giang Nguyen - Irvine CA, US

H04W 28/02
H04W 84/18
H04L 12/18
H04W 40/12
H04W 4/06

Embodiments of the present invention provide a mesh network having nodes connected via both wired and wireless connections, at differing data rates. Each node of the invention also has a plurality of interfaces and a backhaul network. The invention provides a method of managing the mesh network such that at least one node is capable of being in communication with a plurality of other nodes within the network and send and receive packets to other nodes without being hampered by differing protocols, standards, or data rates.

20170177780, Jun 22, 2017

Mar 9, 2017

15/455107

- Armonk NY, US
KALPESH HIRA - AUSTIN TX, US
GIANG NGUYEN - AUSTIN TX, US
BILL N. ON - AUSTIN TX, US
JAMES M. RAKES - AUSTIN TX, US

G06F 17/50

A user specified high level design selects a plurality of IP cores for placement in a customized system on a chip. A single integrated service automatically performs each of a design integration phase, specification phase, and verification phase for the user specified high level design to generate an integration file specifying stitching between a plurality of pins of each of the plurality of IP cores, a specification file specifying one or more characteristics of the customized system on a chip based on the user specified high level design, and a verification testbench for verification of the user specified high level design.

20170116355, Apr 27, 2017

Jan 10, 2017

15/402492

- Armonk NY, US
KALPESH HIRA - AUSTIN TX, US
GIANG NGUYEN - AUSTIN TX, US
BILL N. ON - AUSTIN TX, US
JAMES M. RAKES - AUSTIN TX, US

G06F 17/50

A user specified high level design selects a plurality of IP cores for placement in a customized system on a chip. A single integrated service automatically performs each of a design integration phase, specification phase, and verification phase for the user specified high level design to generate an integration file specifying stitching between a plurality of pins of each of the plurality of IP cores, a specification file specifying one or more characteristics of the customized system on a chip based on the user specified high level design, and a verification testbench for verification of the user specified high level design.

20160364506, Dec 15, 2016

Aug 16, 2016

15/237911

- ARMONK NY, US
KALPESH HIRA - AUSTIN TX, US
GIANG NGUYEN - AUSTIN TX, US
BILL N. ON - AUSTIN TX, US
JAMES M. RAKES - AUSTIN TX, US

G06F 17/50

A user specified high level design selects a plurality of IP cores for placement in a customized system on a chip. A single integrated service automatically performs each of a design integration phase, specification phase, and verification phase for the user specified high level design to generate an integration file specifying stitching between a plurality of pins of each of the plurality of IP cores, a specification file specifying one or more characteristics of the customized system on a chip based on the user specified high level design, and a verification testbench for verification of the user specified high level design.

20150339332, Nov 26, 2015

Jul 31, 2015

14/815693

- ARMONK NY, US
Lyndsi R. Parker - Austin TX, US
Giang C. Nguyen - Austin TX, US
Bill N. On - Austin TX, US

G06F 17/30

An order controller calculates an absolute value of a difference between a first counter value stored with a first next entry set to an active status in a first queue from among at least two queues and a second counter value stored with a second next entry set to the active status in a second queue. The order controller compares the absolute value with a counter midpoint value. The order controller, responsive to the absolute value being less than the counter midpoint value, selects a smaller value of the first counter value of the first counter value and the second counter value as a next event to process. The order controller, responsive to the absolute value being greater than or equal to the counter midpoint value, selects a larger value of the first counter value and the second counter value as the next event to process.

20140169517, Jun 19, 2014

Jan 10, 2013

13/738204

INTERNATIONAL BUSINESS MACHINES CORPORATION - , US
Lyndsi R. Parker - Austin TX, US
Giang C. Nguyen - Austin TX, US
Bill N. On - Austin TX, US

INTERNATIONAL BUSINESS MACHINES CORPORATION - ARMONK NY

G06M 3/00

377 20

An order controller stores each received event in a separate entry in one of at least two queues with a separate counter value set from an arrival order counter at the time of storage, wherein the arrival order counter is incremented after storage of each of the received events and on overflow the arrival order counter wraps back to zero. The order controller calculates an absolute value of the difference between a first counter value stored with an active first next entry in a first queue from among the at least two queues and a second counter value stored with an active second next entry in a second queue from among the at least two queues. The order controller compares the absolute value with a counter midpoint value to determine whether the first counter value was stored before the second counter value.