Gregory R Copeland

7574181, Aug 11, 2009

Aug 31, 2006

11/513735

Gregory Clark Copeland - Plano TX, US

Texas Instruments Incorporated - Dallas TX

H04B 1/02

455103, 455561

System and method for preprocessing a signal for transmission by a power amplifier. In a preferred embodiment a multiple input multiple output processor is coupled to a plurality of power amplifiers for transmitting a signal, where the number of power amplifiers exceeds the number of antennas. The multiple input multiple output processor performs an algorithm to optimize the output vector ensuring that the transmit power for any one amplifier is below a predetermined threshold. In a preferred embodiment a Remez optimization algorithm is performed. Alternative optimization algorithms may be used. In a preferred embodiment the processor is a single integrated circuit. A method is disclosed where a multiple output vector is produced for transmission, using an optimization algorithm to produce an output vector that ensures that for any of the power amplifiers, the transmit power is maintained below a predetermined threshold.

7697591, Apr 13, 2010

Aug 18, 2003

10/643179

Gregory C. Copeland - Plano TX, US

Texas Instruments Incorporated - Dallas TX

H04B 1/00

375130

A wireless base station () for transmitting spread spectrum signals is disclosed. The base station () includes a peak compression unit (), which is comprised of a sequence of peak detection and cancellation circuits (). Each peak detection and cancellation circuit () detects and compresses identified peaks. The further stages of peak detection and cancellation circuits () serve to reduce peaks that, as a result of “peak regrowth”, are caused at sample points near to a reduced peak point. According to one disclosed embodiment, a peak sample point is not qualified for compression unless a number of sample points subsequent to the peak all have lower magnitude than that of the peak. The cancellation pulses applied by the peak detection and cancellation circuits () may be generated by a finite impulse response (FIR) filter pulse, or alternatively by a minimum phase infinite impulse response (IIR) pulse. The peak compression unit () identifies and compresses statistical peaks in the digital symbol amplitude, so that the dynamic range requirements of the power amplifier () in the base station () may be relaxed.

7729446, Jun 1, 2010

Dec 1, 2006

11/607797

Gregory Clark Copeland - Plano TX, US

Texas Instruments Incorporated - Dallas TX

H04L 25/49

375297, 375296, 375355, 330149

Digital predistortion system, methods and circuitry for linearizing a non-linear element using a multiply partitioned architecture that first addresses long or “memory” effects, and separately addresses shorter duration effects. These blocks or circuits are operated with the non-linear element to provide a highly linear system. A first or long predistortion block receives a baseband signal input and includes a plurality of parallel memory blocks each including a programmable linearity, a digital filter, summers, multipliers and multiplexers with control signals for configuring the blocks to form filters of different types. A second or short predistortion block is coupled to the long predistortion block and comprises a generalized Nth order polynomial filter coupled to a programmable linear equalizer. The first predistorter block compensates for effects of a longer duration, and the second predistorter block compensates for effects of a shorter duration. Methods for initializing, parameterizing and adapting the system are disclosed.

7733177, Jun 8, 2010

Dec 11, 2008

12/333061

Milind Anil Borkar - Dallas TX, US
Fernando Alberto Mujica - Allen TX, US
Gregory Copeland - Plano TX, US

Texas Instruments Incorporated - Dallas TX

H03F 1/26

330149, 375297

An apparatus is provided to determine pre-distortion for a nonlinear system. The apparatus comprises a datapath and a power amplifier. The datapath employs predistortion data to generally linearized the power amplifier. To generate this predistortion data, an indirect learning circuit and a direct learning circuit can be employed. The indirect learning circuit is generally coupled to the amplifier circuit so that it can iteratively adjust predistortion data during an indirect learning mode until convergence is reached. The direct learning circuit is generally coupled to the amplifier circuit and the indirect learning circuit and that receives the input signal so that the predistortion data can be copied to the direct learning circuit from the indirect learning after convergence is reached and so that the direct learning circuit can adjust the predistortion data during a direct learning mode.

7773692, Aug 10, 2010

Dec 12, 2006

11/638300

Gregory Clark Copeland - Plano TX, US
Roland Sperlich - Dallas TX, US

Texas Instruments Incorporated - Dallas TX

H04L 25/49

375297

System and methods for a digital linearization of a non linear element. Digital predistortion methods and circuitry for linearizing a non-linear element that address long or “memory” effects and shorter duration effects, these two predistortion functions are operated together in an adaptive fashion with the non-linear element to provide a highly linear system. A short duration predistortion block comprises an Nth order polynomial filter coupled to a programmable linear equalizer. The Nth order filter includes programmable non-linearities and variable delay taps. The Nth order filter may be configured to implement a non-sequential or a sequential ordered polynomial. The equalizer may, in a preferred embodiment, include circuitry for equalizing imbalances between real and complex signal values. The Nth order filter may implement a compound Volterra filter. The combined system of the predistortion circuitry and a non-linear element has a linear input-output signal response.

7778345, Aug 17, 2010

Nov 7, 2007

11/936551

Roland Sperlich - Dallas TX, US
Gregory C. Copeland - Plano TX, US

Texas Instruments Incorporated - Dallas TX

H04B 15/00
H04B 1/10
H04L 25/49

375285, 375296, 375346

In one embodiment of the invention, a modulator mixes a transmit-path signal based on a local oscillator (LO) signal and an amplifier amplifies the mixed transmit-path signal to generate an output signal for transmission. A demodulator generates a receive-path signal based on the output signal and the LO signal. Phase-shift control components provide the output signal and the LO signal to the demodulator during a first time duration and provide a phase-shifted version of one of the output signal and the LO signal to the demodulator during a second time duration. The demodulator generates a second receive-path signal based on the one of the phase-shifted output signal and the phase-shifted LO signal during the second time duration. At least one predistortion circuit adjusts at least one of the transmit-path signal and the receive-path signal based on a difference in signal characteristics of the receive-path signal during the second time duration relative to the first time duration.

7782974, Aug 24, 2010

Mar 24, 2006

11/388356

Gregory Clark Copeland - Plano TX, US

Texas Instuments Incorporated - Dallas TX

H04L 27/00

375295, 330149, 600408, 706 14

An apparatus providing additional response for a distortion correcting device that receives a first signal at a correcting input and provides a first delayed output signal at an output includes: (a) A first signal combiner coupled with an input and the correcting input. (b) A delay unit coupled with the input provides a second delayed signal to a delayed signal terminal. (c) A second signal combiner coupled with the delayed signal terminal and the output employs the output signal and the second delayed signal to present an error signal at a first error terminal. (d) An adaptive circuit coupled with the input locus, the first signal combiner and the second signal combiner employs provides a supplemental signal to the first signal combiner which employs the input signal and the supplemental signal to present the first signal to reduce the error signal.

7783263, Aug 24, 2010

Dec 14, 2006

11/610563

Roland Sperlich - Dallas TX, US
Gregory C. Copeland - Plano TX, US

Texas Instruments Incorporated - Dallas TX

H04B 7/005
H04J 3/00

455 73, 370278, 370280

A transceiver for time-domain duplexed (TDD) communications, for example in connection with wireless broadband data communications, is disclosed. The transceiver includes digital predistortion compensation circuitry, which compensates the digital signals to be transmitted based on feedback signals from the output of the power amplifier, in order to linearize the output from the power amplifier. The feedback signals from the power amplifier are coupled back to the digital predistortion circuitry over part of the same receive path as the received signals from the wireless communications channel. The shared path includes analog-to-digital converters that are used both in the transmit period of the TDD cycle to convert the feedback signals from the power amplifier output, and in the receive period of the TDD cycle to convert the analog received signals.