James A Sutton

7076669, Jul 11, 2006

Apr 15, 2002

10/122544

David I. Poisner - Folsom CA, US
David W. Grawrock - Aloha OR, US
James A. Sutton - Portland OR, US

Intel Corporation - Santa Clara CA

H04L 9/00

713200, 713201

A method and apparatus to communicate with a token using a previously reserved binary number in the start field of a cycle, wherein the cycle is not echoed on any bus other than the bus through which the communication is received.

7779239, Aug 17, 2010

Jul 28, 2004

10/900875

Stephen A. Fischer - Gold River CA, US
Dion Rodgers - Hillsboro OR, US
James A. Sutton - Portland OR, US

Intel Corporation - Santa Clara CA

G06F 7/38
G06F 9/00
G06F 9/44
G06F 15/00

712229

A processor includes a feature control unit to enable or disable one or more processor features individually in response to a user selectable setting. The feature control unit is adapted to disable the processor feature(s) if the user setting has not been updated in accordance with an input regardless of the value of the user setting prior to the update and to enable or disable the processor feature(s) in accordance with the updated user setting after it has been updated. The feature control unit may also include a lock unit to prevent changes to the updated user setting and a software feature selection unit to enable or disable processor features in response to a software feature selection setting and, optionally, only enable or disable processor features whose corresponding updated user setting is user enabled. The feature control unit may also include mechanisms to detect illegal feature selection conditions.

20030191943, Oct 9, 2003

Apr 5, 2002

10/116923

David Poisner - Folsom CA, US
James Sutton - Portland OR, US
David Grawrock - Aloha OR, US

H04L009/00

713/181000

Methods and arrangements to register code are described. Many embodiments may comprise determining an identity such as a hashed identity, digest value, digital signature, or the like, and registering resident code that defines a secure environment, to provide a basis for a system trustworthiness evaluation by another secure environment within the system, a secure environment within another system, a remote system, or the like. Some embodiments comprise transmitting an instruction to store the identity in a repository or memory inaccessible to insecure or untrustworthy hardware and/or software. Several embodiments may comprise verifying a request to access the identity. Other embodiments may comprise storing the identity in a temporary register, such as a register in a hub and/or in memory coupled with an input/output (I/O) hub or within a memory controller hub.

20060059285, Mar 16, 2006

Sep 15, 2004

10/942351

Stephen Fischer - Gold River CA, US
Douglas Moran - Folsom CA, US
James Sutton - Portland OR, US

G06F 13/372

710124000

A method and system of deadlock free bus protection of memory and I/O resources during secure execution. A bus cycle initiates entry of a bus agent into a secure execution mode. The chipset records an identifier of the secure mode processor. Thereafter, the chipset intercedes if another bus agent attempts a security sensitive bus cycle before the secure mode processor exits the secure mode.