US Patent:
20070121495, May 31, 2007
Inventors:
Jeffrey Breti - Nashua NH, US
Douglas Sanders - Framingham MA, US
Harish Bharadwaj - Redwood City CA, US
Suparna Behera - Cupertino CA, US
Gordon Boyd - Arlington MA, US
Richard Bombard - Marlborough MA, US
Philip Herman - Carlisle MA, US
International Classification:
G06F 11/00
G01R 31/08
H04L 1/00
H04L 12/26
Abstract:
A method and apparatus is provided wherein a central Credit Controller Entity (CCE) is connected to a PCIE fabric environment by means of several buses. Flow Control information sent to the CCE over two of the buses indicates the buffer storage capacity that is available at respective Receiver components in the PCIE fabric. The CCE processes the Flow Control information, to generate updates that are sent by a third bus to Transmitter components corresponding to the Receivers. In one useful embodiment, directed to a method of Flow Control management, the CCE provides a repository adapted to store credit count information that represents the available storage capacity of respective Receivers. The method further comprises routing further credit count information from a given Receiver to the CCE, for storage in the repository, following each of successive events that affect the storage capacity of the given Receiver. The CCE is operated to selectively process the credit count information stored in the repository, in order to generate an update credit count. The update credit count is then selectively sent to a given Transmitter, to enable the given Transmitter to send a transmission to the given Receiver.
