Resumes
Resumes
Aaron Hoelscher Phones & Addresses
-
Eleva, WI
-
1003 Pinon Dr, Ames, IA 50014 (515) 292-5329
-
1003 Pinon Dr UNIT 5, Ames, IA 50014 (319) 457-3148
-
905 Pinon Dr, Ames, IA 50014 (515) 292-5329
-
501 Westwood St, Ankeny, IA 50015 (515) 965-5391 (515) 292-5329
-
Cape Fair, MO
-
Perry, IA
-
Lake Jackson, TX
Work
Position:
Construction and Extraction Occupations
Education
Degree:
Bachelor's degree or higher
Emails
Publications
Us Patents
Memory System And Memory Device Having A Serial Interface
View pageUS Patent:
7167410, Jan 23, 2007
Filed:
Apr 26, 2005
Appl. No.:
11/114807
Inventors:
Charles Boecker - Ames IA, US
Scott Irwin - Ames IA, US
Matthew Shafer - Ankeny IA, US
Eric Groen - Ankeny IA, US
Aaron Hoelscher - Ankeny IA, US
Andrew Jenkins - Nevada IA, US
David Black - Story City IA, US
Scott Irwin - Ames IA, US
Matthew Shafer - Ankeny IA, US
Eric Groen - Ankeny IA, US
Aaron Hoelscher - Ankeny IA, US
Andrew Jenkins - Nevada IA, US
David Black - Story City IA, US
Assignee:
Magnalynx - Ames IA
International Classification:
G11C 8/00
US Classification:
36523006, 365233, 365221, 326 41, 331 53
Abstract:
A memory device and system are disclosed that may include a serial data interface, a serial address interface, and a reference clock interface. The reference clock interface is configured to receive a signal from a reference clock source that provides a reference clock signal to a memory control device. The serial interfaces are coupled to other memory devices or memory control devices. A method of transferring data within a memory system using serial interfaces is also disclosed. The method includes performing clock multiplication on a reference clock to provide a multiplied clock, using the multiplied clock to serialize and transmit data onto a serial interface, recovering data from the seal interface, using the reference clock to determine an initial frequency for use by clock and data recovery module, using the data recovered from the serial interface to determine a phase and final frequency of a recovered clock, and using the recovered clock to de-serialize received serial data into parallel data words.
Programmable Logic Device Including Programmable Multi-Gigabit Transceivers
View pageUS Patent:
7406118, Jul 29, 2008
Filed:
Sep 11, 2003
Appl. No.:
10/661016
Inventors:
Eric D. Groen - Ankeny IA, US
Charles W. Boecker - Ames IA, US
William C. Black - Ames IA, US
Scott A. Irwin - Ames IA, US
Joseph N. Kryzak - Ames IA, US
Yiqin Chen - Ames IA, US
Andrew G. Jenkins - Nevada IA, US
Aaron J. Hoelscher - Ankeny IA, US
Charles W. Boecker - Ames IA, US
William C. Black - Ames IA, US
Scott A. Irwin - Ames IA, US
Joseph N. Kryzak - Ames IA, US
Yiqin Chen - Ames IA, US
Andrew G. Jenkins - Nevada IA, US
Aaron J. Hoelscher - Ankeny IA, US
Assignee:
Xilinx, Inc. - San Jose CA
International Classification:
H04B 1/38
US Classification:
375219
Abstract:
A programmable logic device includes a plurality of programmable multi-gigabit transceivers, programmable logic fabric, and a control module. Each of the plurality of programmable multi-gigabit transceivers is individually programmed to a desired transceiving mode of operation in accordance with a plurality of transceiver settings. The programmable logic fabric is operably coupled to the plurality of programmable multi-gigabit transceivers and is configured to process at least a portion of the data being transceived via the multi-gigabit transceivers. The control module is operably coupled to produce the plurality of transceiver settings based on a desired mode of operation for the programmable logic device.
Channel Bonding Of A Plurality Of Multi-Gigabit Transceivers
View pageUS Patent:
7421014, Sep 2, 2008
Filed:
Sep 11, 2003
Appl. No.:
10/659974
Inventors:
Joseph Neil Kryzak - Ames IA, US
Aaron J. Hoelscher - Ankeny IA, US
Thomas E. Rock - Richmond IL, US
Aaron J. Hoelscher - Ankeny IA, US
Thomas E. Rock - Richmond IL, US
Assignee:
XILINX, Inc. - San Jose CA
International Classification:
H04B 1/38
H04L 5/16
H04L 5/16
US Classification:
375219, 375222, 375220, 370535, 455 73, 455 88, 455507
Abstract:
A method for channel bonding begins when a master transceiver receives a channel bonding sequence. The process continues with the master transceiver generating a channel bonding request and transmitting it and channel bonding configuration information to the slave transceiver. The process continues with each slave receiving the channel bonding sequence, the channel bonding request and the channel bonding configuration information. The process continues as each slave processes the channel bonding request and the channel bonding sequence in accordance with the channel bonding configuration information to determine individual slave channel bonding start information. The process continues as the master processes the channel bonding sequence in accordance with the channel bonding configuration information and the channel bonding request to determine master channel bonding start information.
Method Of Encoding And Synchronizing A Serial Interface
View pageUS Patent:
7599396, Oct 6, 2009
Filed:
Jul 11, 2005
Appl. No.:
11/178958
Inventors:
Charles Boecker - Ames IA, US
Scott Irwin - Ames IA, US
Matthew Shafer - Ankeny IA, US
Eric Groen - Ankeny IA, US
Aaron Hoelscher - Ankeny IA, US
Andrew Jenkins - Nevada IA, US
David Black - Story City IA, US
Scott Irwin - Ames IA, US
Matthew Shafer - Ankeny IA, US
Eric Groen - Ankeny IA, US
Aaron Hoelscher - Ankeny IA, US
Andrew Jenkins - Nevada IA, US
David Black - Story City IA, US
Assignee:
Magnalynx, Inc. - Ames IA
International Classification:
H04J 3/06
US Classification:
370474, 370503
Abstract:
The present disclosure is generally directed to a method of communicating data between two or more semiconductor devices. Serial interfaces using the method have a reduction in latency compared to conventional serial interfaces. The method enables features needed for a serial interface, such as limited run lengths and recognizable data boundaries to establish alignment. In addition, a method for synchronizing two or more semiconductor devices through serial interfaces has been presented. This is done by passing a marker data pattern through the system.
Framing Of Transmit Encoded Data And Linear Feedback Shifting
View pageUS Patent:
7724903, May 25, 2010
Filed:
Mar 20, 2008
Appl. No.:
12/052699
Inventors:
Joseph Neil Kryzak - San Jose CA, US
Aaron J. Hoelscher - Ankeny IA, US
Aaron J. Hoelscher - Ankeny IA, US
Assignee:
XILINX, Inc. - San Jose CA
International Classification:
H04L 9/00
H04K 1/00
H04K 1/00
US Classification:
380265, 380259, 380255
Abstract:
Framing transmit encoded output data begins by determining a scrambling remainder between scrambling of an input code word in accordance with a 1scrambling protocol and the scrambling of the input code word in accordance with an adjustable scrambling protocol. The processing continues by adjusting the adjustable scrambling protocol based on the scrambling remainder to produce an adjusted scrambling protocol. The processing then continues by scrambling the input code word in accordance with the 1scrambling protocol to produce a 1scrambled code word. The processing continues by scrambling the input code word in accordance with the adjusted scrambling protocol to produce a scrambled partial code word. The processing continues by determining a portion of the 1scrambled code word based on the scrambling remainder. The process then continues by combining the scrambled partial code word with the portion of the 1scrambled code word to produce the transmit encoded output data.
Method And Apparatus To Encode And Synchronize A Serial Interface
View pageUS Patent:
8135037, Mar 13, 2012
Filed:
Aug 26, 2009
Appl. No.:
12/548135
Inventors:
Charles Boecker - Ames IA, US
Scott Irwin - Ames IA, US
Matthew Shafer - Ankeny IA, US
Eric Groen - Ankeny IA, US
Aaron Hoelscher - Ankeny IA, US
Andrew Jenkins - Nevada IA, US
David Black - Story City IA, US
Scott Irwin - Ames IA, US
Matthew Shafer - Ankeny IA, US
Eric Groen - Ankeny IA, US
Aaron Hoelscher - Ankeny IA, US
Andrew Jenkins - Nevada IA, US
David Black - Story City IA, US
Assignee:
MoSys, Inc. - Santa Clara CA
International Classification:
H04J 3/06
H03M 13/03
H03M 13/03
US Classification:
370474, 370503
Abstract:
The present disclosure is generally directed to a method and apparatus to communicate data between two or more semiconductor devices. In an embodiment, a method includes synchronizing a master device with a slave device, where the master device includes a semiconductor device. Synchronizing includes transmitting a first synchronization marker data pattern via a first serial interface from the master device at a first time, and receiving a second synchronization marker data pattern via a second serial interface at the master device at a second time in response to transmitting the first synchronization marker data pattern. Synchronizing also includes determining, based at least in part on the first time and the second time, a third time when a reply is to be received by the master device in response to a request transmitted from the master device to the slave device.
Framing Of Transmit Encoded Data And Linear Feedback Shifting
View pageUS Patent:
7362864, Apr 22, 2008
Filed:
Sep 11, 2003
Appl. No.:
10/659979
Inventors:
Joseph Neil Kryzak - Ames IA, US
Aaron J. Hoelscher - Ankeny IA, US
Aaron J. Hoelscher - Ankeny IA, US
Assignee:
Xilinx, Inc. - San Jose CA
International Classification:
H04L 9/00
US Classification:
380268, 380261, 380260
Abstract:
Framing transmit encoded output data begins by determining a scrambling remainder between scrambling of an input code word in accordance with a 1scrambling protocol and the scrambling of the input code word in accordance with an adjustable scrambling protocol. The processing continues by adjusting the adjustable scrambling protocol based on the scrambling remainder to produce an adjusted scrambling protocol. The processing continues by scrambling the input code word in accordance with the 1scrambling protocol to produce a 1scrambled code word. The processing continues by scrambling the input code word in accordance with the adjusted scrambling protocol to produce a scrambled partial code word. The processing continues by determining a portion of the 1scrambled code word based on the scrambling remainder. The process continues by combining the scrambled partial code word with the portion of the 1scrambled code word to produce the transmit encoded output data.
Integrated Circuit With Auto Negotiation
View pageUS Patent:
6976102, Dec 13, 2005
Filed:
Sep 11, 2003
Appl. No.:
10/660159
Inventors:
Eric D. Groen - Ankeny IA, US
Charles W. Boecker - Ames IA, US
William C. Black - Ames IA, US
Scott A. Irwin - Ames IA, US
Joseph N. Kryzak - Ames IA, US
Aaron J. Hoelscher - Ankeny IA, US
Charles W. Boecker - Ames IA, US
William C. Black - Ames IA, US
Scott A. Irwin - Ames IA, US
Joseph N. Kryzak - Ames IA, US
Aaron J. Hoelscher - Ankeny IA, US
Assignee:
Xilinx, Inc. - San Jose CA
International Classification:
G06F013/38
US Classification:
710 72, 710105, 710100, 710106, 326 38
Abstract:
Method and apparatus for auto-negotiation of a programmable logic device for any of a plurality of communication protocols is described. The programmable logic device is programmed for auto negotiation to establish a communication session. The programmable logic device has access to transceiver attributes. A portion of the transceiver attributes are selected in response to session information from the auto negotiation. The portion of the transceiver attributes selected are for configuring at least one transceiver for a communication protocol.