Inventors:
Kersi H. Vakil - Olympia WA, US
Adarsh Panikkar - Tacoma WA, US
Abhimanyu Kolla - Tacoma WA, US
Arnaud Forestier - Irvine CA, US
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
G06F 1/12
Abstract:
According to some embodiments, a device includes an interpolator to receive at least a first clock signal having a first clock phase and to receive a second clock signal having a second clock phase. The interpolator may include a first plurality of interpolator legs associated with the first clock signal, a second plurality of interpolator legs associated with the second clock signal, and an output node to provide an output clock signal having an output clock phase based on the first clock signal, the second clock signal, and on a number of the first plurality and the second plurality of interpolator legs that are activated. The device may also include an interpolator control to activate only one of the first plurality and the second plurality of interpolator legs.