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Afshin Momtaz Phones & Addresses

  • 25322 Derbyhill Dr, Laguna Hills, CA 92653 (949) 448-8989
  • Derbyhill Dr, Laguna Hills, CA 92637
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  • 36 Nantucket Ln, Aliso Viejo, CA 92656
  • 45 Bluff Cove Dr, Aliso Viejo, CA 92656
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  • 8 Passaflora Ln, Ladera Ranch, CA 92694
  • Mission Viejo, CA
  • 4061 Germainder Way, Irvine, CA 92612 (949) 786-3810
  • Tustin, CA
  • Lake Forest, CA
  • Orange, CA

Publications

Us Patents

Stable Phase Locked Loop Having Separated Pole

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US Patent:
6389092, May 14, 2002
Filed:
Jul 12, 2000
Appl. No.:
09/615033
Inventors:
Afshin Momtaz - Irvine CA
Assignee:
NewPort Communications, Inc. - Irvine CA
International Classification:
H03L 7093
US Classification:
375376, 327157, 331 14, 331 17
Abstract:
A phase locked loop circuit having a loop filter including a variable resistance for normal loop operation and for fast acquisition has improved stability by defining a loop pole separate from the loop filter. The loop pole remains constant during transition periods of the filter resistance. The loop pole remains constant while loop bandwidth is varied for either phase acquisition or normal operation, and the ratio of bandwidth to pole varies only linearly which makes the phase locked loop more stable during the bandwidth adjustment.

Gm Cell Based Control Loops

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US Patent:
6526113, Feb 25, 2003
Filed:
Mar 31, 2000
Appl. No.:
09/540243
Inventors:
German Gutierrez - Carlsbad CA
Afshin Momtaz - Irvine CA
Assignee:
Broadcom Corporation - Irvine CA
International Classification:
H03D 324
US Classification:
375376, 327156, 327157, 331 25, 331 32
Abstract:
Various circuit techniques employ a transconductance (gm) cell in control loops to implement circuits such as phase locked loops and delay locked loops that are capable of operating at ultra high frequencies with improved precision and noise performance. The gm cell is designed to operate on an analog input signal with a very small swing and more gradual transition edges. These characteristics allow implementation of high frequency circuits and systems including, for example, transceivers for fiber optic channels, disk driver electronics and the like.

Stable Phase Locked Loop Having Separated Pole

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US Patent:
6549599, Apr 15, 2003
Filed:
Mar 11, 2002
Appl. No.:
10/095556
Inventors:
Afshin Momtaz - Irvine CA
Assignee:
Broadcom Corporation - Irvine CA
International Classification:
H03L 7093
US Classification:
375376, 327157, 331 14, 331 17
Abstract:
A phase locked loop circuit having a loop filter including a variable resistance for normal loop operation and for fast acquisition has improved stability by defining a loop pole separate from the loop filter. The loop pole remains constant during transition periods of the filter resistance. The loop pole remains constant while loop bandwidth is varied for either phase acquisition or normal operation, and the ratio of bandwidth to pole varies only linearly which makes the phase locked loop more stable during the bandwidth adjustment.

Varactor Based Differential Vco Band Switching

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US Patent:
6621362, Sep 16, 2003
Filed:
May 18, 2001
Appl. No.:
09/860284
Inventors:
Afshin Momtaz - Irvine CA
Armond Hairapetian - Glendale CA
Assignee:
Broadcom Corporation - Irvine CA
International Classification:
H03L 708
US Classification:
331117R, 331117 FE, 331167, 331177 V
Abstract:
Method and circuitry for implementing VCOs with improved frequency band switching use differentially-coupled varactors to implement the different frequency bands. According to a specific embodiment, one side of a varactor couples to the tank circuit and the other side is coupled either to ground or to the positive power supply VDD without introducing any series parasitic resistance.

Methods And Circuitry For Implementing First-In First-Out Structure

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US Patent:
6696854, Feb 24, 2004
Filed:
Sep 17, 2001
Appl. No.:
09/956374
Inventors:
Afshin Momtaz - Irvine CA
Xin Wang - Irvine CA
Jun Cao - Irvine CA
Armond Hairapetian - Glendale CA
David Chung - Newport Beach CA
Assignee:
Broadcom Corporation - Irvine CA
International Classification:
G11C 700
US Classification:
326 37, 326 40, 365221
Abstract:
Methods and circuitry for implementing high speed first-in first-out (FIFO) structures. In one embodiment, a FIFO is disclosed that allows the frequency of one clock, e. g. , the write clock, to be different than (e. g. , half) that of the other (read) clock. In another embodiment a FIFO is presented that can be set and/or reset asynchronously. Other embodiments are disclosed wherein the read and write pointers are effectively monitored to ensure proper timing relationship, to detect loss of clock as well as to detect other abnormal FIFO conditions.

Fully Differential Cmos Phase-Locked Loop

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US Patent:
6721380, Apr 13, 2004
Filed:
Jul 31, 2001
Appl. No.:
09/919636
Inventors:
Armond Hairapetian - Glendale CA
Jun Cao - Irvine CA
Afshin Momtaz - Irvine CA
Assignee:
Broadcom Corporation - Irvine CA
International Classification:
H03L 708
US Classification:
375376, 375374, 327148, 327157, 331 25
Abstract:
The present invention relates in general to integrated circuits, and in particular to method and circuitry for implementing an improved phase-locked loop (PLL) in complementary metal-oxide-semiconductor (CMOS) technology using current-controlled CMOS (C MOS) logic. In an exemplary embodiment, a phase-locked loop includes a phase-frequency detector, a Gm cell block, a low pass filter and a voltage controlled oscillator. These various elements of the phase-locked loop are connected to one another in a fully differential manner, i. e. , each element has an input and/or an output each having at least a differential signal. In one embodiment, each of these various elements of the phase-locked loop is implemented using C MOS logic.

Built-In Self-Test For Multi-Channel Transceivers Without Data Alignment

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US Patent:
6725408, Apr 20, 2004
Filed:
Aug 7, 2000
Appl. No.:
09/632666
Inventors:
Jun Cao - Irvine CA
Afshin Momtaz - Irvine CA
Assignee:
Broadcom Corporation - Irvine CA
International Classification:
G06F 1100
US Classification:
714738, 714742
Abstract:
A method and device for testing multi-channel transceivers in an integrated circuit is provided. More specifically, the present invention relates to a method and device for implementing a built-in self-test for multi-channel transceivers. An exemplaxy embodiment of the present invention includes a test pattern generator, a multiplexer, a demultiplexer, and a test result evaluator. The test pattern generator generates a test pattern which is fed into each of the input channels of the multiplexer. The multiplexer multiplexes the data from all its input channels and then relays the data to the demultiplexer. The test result evaluator then individually checks the data at each of the output channels of the demultiplexer to determine whether the data received at each output channel is the same as the test pattern. In order to facilitate the checking process, signature analysis is utilized.

Gm Cell Based Control Loops

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US Patent:
6748041, Jun 8, 2004
Filed:
Dec 13, 2002
Appl. No.:
10/318586
Inventors:
Germain Gutierrez - Carlsbad CA
Afshin Momtaz - Irvine CA
Assignee:
Broadcom Corporation - Irvine CA
International Classification:
H03D 324
US Classification:
375376, 327156, 327157, 331 25, 331 32
Abstract:
Various circuit techniques employ a transconductance (gm) cell in control loops to implement circuits such as phase locked loops and delay locked loops that are capable of operating at ultra high frequencies with improved precision and noise performance. The gm cell is designed to operate on an analog input signal with a very small swing and more gradual transition edges. These characteristics allow implementation of high frequency circuits and systems including, for example, transceivers for fiber optic channels, disk driver electronics and the like.
Afshin D Momtaz from Laguna Hills, CA, age ~55 Get Report