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Dusan Suvakovic

from Pleasanton, CA
Age ~60
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Also known as:
Dusan C
Related to:
Milos Suvakovic
Connected to:
Sarah L Suval, 42Sejad S Suvalic, 66Tatiana Suvalian, 49Tran Suvan, 91Leelawadee Suvanaratosot, 60Karen S Suvankham, 58Neal S Suvannakul, 42Audy V Suvansin, 78Tanaporn Suvansilpakit, 33Mary T Suvanto, 59

Dusan Suvakovic Phones & Addresses

  • Pleasanton, CA
  • 4079 Glencoe Ave, Marina del Rey, CA 90292
  • 1309 Sun Valley Way, Florham Park, NJ 07932 (973) 665-0105

Resumes

Resumes

Dusan Suvakovic Photo 1

Researcher

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Location:
San Diego, CA
Industry:
Telecommunications
Work:
Nokia Bell Labs
Researcher
Institute Mihailo Pupin 1988 - 1992
Senior Researcher
Education:
University of Toronto
Skills:
Electrical Engineering
Computer Engineering
Vlsi
Cmos
Energy Efficiency
Low Power Design
Digital Circuit Design
Fpga
Analog Circuit Design
Green It
Embedded Systems
Computer Hardware
Error Correcting Codes
Access Networks
Optical Network
Computer Science
Signal Processing
Algorithms
Wireless
Telecommunications
Matlab
Digital Signal Processors
Machine Learning
Network Design
C
Vlsi Cad
Cadence
Multidisciplinary Design
R&D
Simulations
Artificial Intelligence
Research and Development
Semiconductors
Dusan Suvakovic Photo 2

Dusan Suvakovic

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Publications

Us Patents

Method And Apparatus For Multiphase, Fast-Locking Clock And Data Recovery

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US Patent:
7242739, Jul 10, 2007
Filed:
Jun 12, 2003
Appl. No.:
10/460572
Inventors:
Glenn M Boles - Fords NJ, US
Alfred Earl Dunlop - Kattskill Bay NY, US
Manyalibo Joseph Matthews - Jersey City NJ, US
Dusan Suvakovic - Florham Park NJ, US
Doutje T. Van Veen - Berkeley Heights NJ, US
Assignee:
Lucent Technologies Inc. - Murray Hill NJ
International Classification:
H03D 3/24
US Classification:
375375, 375376, 375371
Abstract:
A method and apparatus for clock and data recovery that is advantageous in burst-mode systems is disclosed. This clock and data recovery method allows a) fast locking to a rapidly changed phase of the transmission clock, and b) stable tracking of a slowly changing phase of the transmission clock. Such fast locking minimizes the “guard band” between consecutive transmission bursts, while stable tracking provides reliable data tracking, resulting in the efficient use of bandwidth. A plurality of clock signals, is generated, each having a different phase. The phase of an input signal data stream is determined and a desired clock signal in the plurality that corresponds to the phase of the input data stream is selected and used to sample the input signal data stream.

Software-Hardware Partitioning Of A Scheduled Medium-Access Protocol

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US Patent:
7525971, Apr 28, 2009
Filed:
Mar 16, 2005
Appl. No.:
11/081932
Inventors:
Martin D. Carroll - Watchung NJ, US
Ilija Hadzic - Millington NJ, US
Dusan Suvakovic - Marina Del Rey CA, US
Assignee:
Alcatel-Lucent USA Inc. - Murray Hill NJ
International Classification:
H04L 12/28
H04J 14/00
US Classification:
3703954, 398 68
Abstract:
A processing device, configured to implement at least a portion of a scheduled medium-access protocol (SMAP) in a communication system, comprises a processor, a memory coupled to the processor, and one or more additional hardware modules. The functionality of the portion of the SMAP implemented in the processing device is partitioned between software, stored in the memory and executable by the processor, and hardware comprising the one or more additional hardware modules. In an illustrative embodiment, the processing device comprises a head-end device of a passive optical network, and the functionality comprises at least a scheduler and a grant generator, with the scheduler being implemented in the software and the grant generator being implemented in the hardware.

High-Speed Serial Transceiver With Sub-Nominal Rate Operating Mode

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US Patent:
7672416, Mar 2, 2010
Filed:
Mar 30, 2005
Appl. No.:
11/093638
Inventors:
Ilija Hadzic - Millington NJ, US
Dusan Suvakovic - Marina del Rey CA, US
Assignee:
Alcatel-Lucent USA Inc. - Murray Hill NJ
International Classification:
H04L 7/04
H04L 7/00
US Classification:
375360, 375355
Abstract:
A communication device comprises a receiver and a data recovery module. The receiver may be an element of a serial transceiver embedded in or otherwise associated with an FPGA or other type of reconfigurable hardware. The receiver is operable with an unlocked sampling clock. The data recovery module is configured to detect transition edges in data signal samples generated by the receiver using the unlocked sampling clock, and to determine from the detected edges a sampling point for use in recovery of the associated data. The data recovery module is further configured to provide adjustment in the sampling point in the presence of transition edge variations, such as one or more exception conditions, that are attributable to the unlocked sampling clock.

System, Method And Computer Readable Medium For Providing Dual Rate Transmission On A Gigabit Passive Optical Network

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US Patent:
8086104, Dec 27, 2011
Filed:
Feb 15, 2008
Appl. No.:
12/070225
Inventors:
Dusan Suvakovic - Marina del Rey CA, US
Assignee:
Alcatel Lucent - Paris
International Classification:
H04B 10/00
US Classification:
398 72, 398100, 398 54, 398 57
Abstract:
In a dual rate gigabit passive optical network, an optical line termination (OLT) transmits a first rate (GPON) message frame interleaved with a second rate (NGPON) message frame. An unused ATM partition of the GPON message frame is provided with a header and payload portion of the NGPON message frame so that the message frame remains at a predetermined length required by the network.

System And Method For Pathological Pattern Protection

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US Patent:
8259944, Sep 4, 2012
Filed:
Jun 16, 2008
Appl. No.:
12/214051
Inventors:
Dusan Suvakovic - Marina del Rey CA, US
Glenn M. Boles - Fords NJ, US
Assignee:
Alcatel Lucent - Paris
International Classification:
G06F 11/08
G06F 11/16
US Classification:
380268, 726 22
Abstract:
In a frame synchronous scrambled communications network, communications are protected from pathological bit patterns that may lead to loss of receiver lock by detecting a pathological bit pattern in an incoming traffic stream using a pathological pattern detector. When a pathological bit pattern, such as a transition-less bit pattern, is detected, a corrective bit pattern is generated and inserted or substituted into the incoming traffic stream before transmission to the receiver. The receiver can be configured to revert the modified traffic stream back to the original traffic stream.

System And Method For Scheduling Timeslots For Transmission By Optical Nodes In An Optical Network

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US Patent:
8326152, Dec 4, 2012
Filed:
Apr 15, 2010
Appl. No.:
12/760870
Inventors:
Doutje T. Van Veen - New Providence NJ, US
Adriaan J. De Lind Van Wijngaarden - New Providence NJ, US
Dusan Suvakovic - Pleasanton CA, US
Assignee:
Alcatel Lucent - Paris
International Classification:
H04B 10/00
H04B 10/08
H04J 14/00
H04J 14/02
US Classification:
398 72, 398 25, 398 33, 398 38, 398 94, 398160
Abstract:
A signal strength corresponding to an incoming optical burst from each of a plurality of optical nodes is measured. The measurements can be performed at system start-up, configuration/installation of the optical nodes and/or at certain intervals of operation of the optical nodes. Signal strength information for the optical nodes based on the measurements is stored in memory. When scheduling the optical nodes for transmission, a preferred transmission order is determined in response to the stored signal strength information. In an embodiment, the preferred order is determined to reduce differences in signal strength levels between consecutive optical bursts.

System And Method For Energy-Efficient Operation Of Optical Network Units Based On Scheduled Payload Reception

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US Patent:
8521033, Aug 27, 2013
Filed:
Jun 10, 2009
Appl. No.:
12/482412
Inventors:
Dusan Suvakovic - Pleasanton CA, US
Assignee:
Alcatel Lucent - Paris
International Classification:
H04J 14/00
US Classification:
398171, 398166, 398 66, 398 99, 398 71
Abstract:
In a passive optical network, power consumption of the ONU can be reduced by communicating a transmission schedule from the OLT to the ONU that indicates time slots in which the ONU is scheduled to receive payload transmissions from the OLT. Components of the ONU that would normally operate continuously, including processing payloads addressed to other ONUs, are placed in a reduced power state outside of the ONU's allocated time slots.

Burst-Mode Data Recovery For Multi-Gigabit Passive Optical Networks

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US Patent:
8538258, Sep 17, 2013
Filed:
May 8, 2008
Appl. No.:
12/151645
Inventors:
Dusan Suvakovic - Marina del Rey CA, US
Assignee:
Alcatel Lucent - Paris
International Classification:
H04L 7/00
US Classification:
398 35, 398 99, 398100, 398153
Abstract:
In a TDMA optical network, a clock data recovery module uses signal oversampling and preamble correlation together with enhanced performance modules to extract additional data from the upstream transmission signal. Information including duty cycle, ONT power estimation, signal noise and jitter can be extracted from the upstream signal using digital logic and used to tune network components and/or alleviate network conditions.
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Dusan Suvakovic from Pleasanton, CA, age ~60 Get Report