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Gregory T Ostrowicki

from Dallas, TX
Age ~41
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Also known as:
Gregory Ostrowick
Related to:
Jennifer S Mcgarry, 47Erin J Walker, 39Mark G Jacoby, 70Jean H Jacoby, 99Renata A Ostrowicki, 47Pamela E Jacoby, 69Eve Ostrowicki, 71Jeff Jacoby, 36Benjamin OstrowickiAshley E Jacoby, 42Marina Drits, 44Stanislaw Ostrowicki, 77
Connected to:
Albert Ostrowiak, 66Amanda Ostrowitz, 38Gerald D Ostrowiecki, 61Aaron P Ostrowsky, 44Alana M Ostrowski, 41Allan T Ostrowski, 52Bogdan P Ostrowski, 62Brandon A Ostrowski, 34Brittany Ostrowske, 31Carmen D Ostrowski, 69

Gregory Ostrowicki Phones & Addresses

  • Dallas, TX
  • 2061 Glencoe Dr, Rockwall, TX 75087
  • 401 10Th St NW APT E219, Atlanta, GA 30318
  • Howell, NJ
  • Mountain View, CA

Work

Company: Texas instruments Sep 1, 2012 Position: Packaging engineer

Education

Degree: Doctorates, Doctor of Philosophy School / High School: Georgia Institute of Technology 2008 to 2012 Specialities: Mechanical Engineering

Skills

Finite Element Analysis • Matlab • Ansys • Characterization • Mems • Thin Films • Microfabrication • Mechanical Engineering • Cad • Fracture Mechanics • Experimentation

Languages

English • Polish

Industries

Semiconductors

Resumes

Resumes

Gregory Ostrowicki Photo 1

Packaging Engineer

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Location:
Dallas, TX
Industry:
Semiconductors
Work:
Texas Instruments
Packaging Engineer
Georgia Institute of Technology Aug 2005 - Sep 2012
Graduate Research Assistant
Georgia Institute of Technology Aug 2006 - Dec 2011
Teaching Assistant
Jones Day 2007 - 2008
Engineering Consultant
Cisco Jun 2006 - Aug 2006
Intern
Education:
Georgia Institute of Technology 2008 - 2012
Doctorates, Doctor of Philosophy, Mechanical Engineering Georgia Institute of Technology 2005 - 2008
Master of Science, Masters, Mechanical Engineering Rutgers University 2001 - 2005
Bachelors, Bachelor of Science, Mechanical Engineering
Skills:
Finite Element Analysis
Matlab
Ansys
Characterization
Mems
Thin Films
Microfabrication
Mechanical Engineering
Cad
Fracture Mechanics
Experimentation
Languages:
English
Polish

Publications

Us Patents

Semiconductor Device Having Compliant And Crack-Arresting Interconnect Structure

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US Patent:
20170250126, Aug 31, 2017
Filed:
Nov 15, 2016
Appl. No.:
15/352393
Inventors:
- Dallas TX, US
Gregory Thomas Ostrowicki - Rockwall TX, US
International Classification:
H01L 23/495
H01L 25/07
H01L 23/00
Abstract:
A power converter () has a first transistor chip () conductively stacked on top of a second transistor chip () attached to a substrate (). A first metallic clip () has a plate portion () and a ridge portion () bent at an angle from the plate portion. The plate portion is attached to the terminal of the first transistor chip opposite the second transistor chip. The ridge portion extends to the substrate is and is configured as a plurality of parallel straight fingers (). Each finger is discretely attached to the substrate using attachment material (), for instance solder, and operable as a spring-line cantilever to accommodate, under a force lying in the plane of the substrate, elastic elongation based upon inherent material characteristics.
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Gregory T Ostrowicki from Dallas, TX, age ~41 Get Report