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John Retika Phones & Addresses

  • 49206 Daffodil Ter, Fremont, CA 94539 (510) 683-9988
  • 370 Elan Village Ln, San Jose, CA 95134 (408) 954-1933
  • 41 Torregata Loop, San Jose, CA 95134 (408) 382-9988
  • 371 1225 N, Logan, UT 84341
  • Alameda, CA
  • Santa Clara, CA

Publications

Us Patents

Graphics Engine Command Fifo For Programming Multiple Registers Using A Mapping Index With Register Offsets

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US Patent:
RE41523, Aug 17, 2010
Filed:
May 25, 2006
Appl. No.:
11/441465
Inventors:
John Y. Retika - Fremont CA, US
International Classification:
G09G 5/36
US Classification:
345558, 345559, 712 E9024, 712 E9042, 712 E9067
Abstract:
A host writes graphics commands and data to programmable registers through a command FIFO that is read by a graphics controller or BitBlt engine. Rather than write an address and a data value for each register programmed, the host writes one address, one index, and several data values. The address points to an index register. The index is a mapping index word with several multi-bit mapping fields. Each multi-bit mapping field in the index identifies a register to be programmed with one of the data values. Since N bits are used for each mapping field, the mapping field can select one register in a bank of 2−1 registers. The registers in the bank can be programmed in any order, and registers can be skipped. Since only one index is stored in the command FIFO for programming several registers, less memory space and fewer bus cycles are required.

Graphics Engine Command Fifo For Programming Multiple Registers Using A Mapping Index With Register Offsets

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US Patent:
6741257, May 25, 2004
Filed:
Jan 20, 2003
Appl. No.:
10/248431
Inventors:
John Y. Retika - San Jose CA
Assignee:
NeoMagic Corp. - Santa Clara CA
International Classification:
G09G 536
US Classification:
345558, 345559
Abstract:
A host writes graphics commands and data to programmable registers through a command FIFO that is read by a graphics controller or BitBlt engine. Rather than write an address and a data value for each register programmed, the host writes one address, one index, and several data values. The address points to an index register. The index is a mapping index word with several multi-bit mapping fields. Each multi-bit mapping field in the index identifies a register to be programmed with one of the data values. Since N bits are used for each mapping field, the mapping field can select one register in a bank of 2 -1 registers. The registers in the bank can be programmed in any order, and registers can be skipped. Since only one index is stored in the command FIFO for programming several registers, less memory space and fewer bus cycles are required.
John Y Retika from Fremont, CA, age ~50 Get Report