Search

Jose E Schutt-Aine

from Urbana, IL
Age ~65
Get Report
Also known as:
Jose E Schutt, Jose E Aine, Jose S Aine, Jose E Schuttaine, Jose Schutt Aine, Aine J Schutt, Jose Paine
Phone and address:
2521 Stone Creek Blvd, Urbana, IL 61802
(217) 384-3134
Related to:
David J Paine, 62Sandra A Martin, 63Timothy Miller, 61Cheryl Hutchins, 60
Connected to:
Alice L Schutt, 115Alwin D Schutt, 68Antoinette B Schutta, 68Betty L Schuttak, 84Carmela J Schutta, 87Chandra L Schutt, 49Charlotte F Schutt, 49Claire J Schutt, 97Crysta L Schutt, 39Elaina D Schutt, 60

Jose Schutt-Aine Phones & Addresses

  • 2521 Stone Creek Blvd, Urbana, IL 61802 (217) 384-3134
  • 301 Curtis Rd, Savoy, IL 61874 (217) 356-9469
  • 401 W Curtis Rd APT 3-206, Savoy, IL 61874 (217) 493-8487
  • Beaverton, OR
  • Champaign, IL

Resumes

Resumes

Jose Schutt-Aine Photo 1

Professor

View page
Location:
Urbana, IL
Work:
University of Illinois at Urbana-Champaign
Professor
Jose Schutt-Aine Photo 2

Professor

View page
Location:
Urbana, IL
Industry:
Electrical/Electronic Manufacturing
Work:
UIUC
Professor

Publications

Us Patents

Raised On-Chip Inductor And Method Of Manufacturing Same

View page
US Patent:
6922127, Jul 26, 2005
Filed:
May 23, 2002
Appl. No.:
10/154447
Inventors:
Jun Zou - Urbana IL, US
Chang Liu - Champaign IL, US
Jose Schutt-Aine - Savoy IL, US
Assignee:
The Trustees of the University of Illinois - Urbana IL
International Classification:
H01F005/00
US Classification:
336200, 336223, 336232, 296021, 29605
Abstract:
A raised on-chip planar inductor. An inductor is fabricated on a substrate. The inductor, except for an anchoring extremity, is lifted from the substrate, preferably by application of a magnetic field to a magnetic layer formed on the inductor. The lifting of the inductor deforms a plastic bending region. After the magnetic field is removed, the inductor remains raised with respect to the substrate.

Use Of Smith Chart To Compensate For Missing Data On Network Performance At Lower Frequency

View page
US Patent:
8056034, Nov 8, 2011
Filed:
Jan 17, 2008
Appl. No.:
12/016151
Inventors:
Jose Schutt-Aine - Savoy IL, US
Jilin Tan - Nashua NH, US
Assignee:
Cadence Design Systems, Inc. - San Jose CA
International Classification:
G06F 17/50
US Classification:
716113, 716101, 716126, 716132
Abstract:
A method is provided to use a Smith Chart technique to obtain frequency domain network performance information corresponding to a passive network including one or more passive devices comprising: receiving first data representing a first Smith Chart plot of coefficients representing measured mismatch between a source impedance of a network and a load impedance of the network for higher frequency components; and extrapolating a predicted substantially spiral shaped second Smith Chart plot of coefficients based upon the first data, which includes a coefficient representing predicted mismatch between the source impedance of the network and the load impedance of the network for lower frequency components.

Method And System For Adaptive Modeling And Simulation Of Lossy Transmission Lines

View page
US Patent:
8386216, Feb 26, 2013
Filed:
Dec 17, 2009
Appl. No.:
12/640357
Inventors:
Feras Al-Hawari - Hudson NH, US
Jilin Tan - Nashua NH, US
Jose Schutt-Aine - Urbana IL, US
Assignee:
Cadence Design Systems, Inc. - San Jose CA
International Classification:
G06F 7/60
G06F 17/10
US Classification:
703 2
Abstract:
A method and system are provided for adaptively modeling and simulating high speed response of a transmission line. A simulation unit maintains a plurality of curve approximation options for modeling the transmission line. The suitability of a predefined primary one of the curve approximation options for modeling is determined based on frequency-domain modal scattering parameters obtained according to frequency-dependent data characterizing the transmission line. One of the options is selectively executed in response to the determination, in order to generate a macromodel of the transmission line. The primary option is executed upon determination of suitability, while a secondary one of the curve approximation options is alternatively executed upon determination of non-suitability. Transient simulation is then executed upon the resulting macromodel of the transmission line.

Semiconductor Die Package Having Mesh Power And Ground Planes

View page
US Patent:
20020117751, Aug 29, 2002
Filed:
May 31, 2001
Appl. No.:
09/867438
Inventors:
Stanford Crane, Jr. - Santa Clara CA, US
Myoung-soo Jeon - Fremont CA, US
Charley Ogata - San Jose CA, US
Andreas Cangellaris - Champaign IL, US
Jose Schutt-Aine - Savoy IL, US
Assignee:
Silicon Bandwidth, Inc.
International Classification:
H01L023/48
H01L023/52
H01L029/40
US Classification:
257/734000
Abstract:
A cluster grid array semiconductor die package and mating socket provide electrical connection between one or more semiconductor dies housed within the die package and substrate, such as a printed circuit board, on which the mating socket is mounted. The die package and the mating socket may be easily connected and disconnected. The die package may include power and ground planes built into and distributed within the housing of the die package.

Rf Connector With Chip Carrier And Coaxial To Coplanar Transition

View page
US Patent:
20030099098, May 29, 2003
Filed:
Nov 23, 2001
Appl. No.:
09/990877
Inventors:
Jose Schutt-Aine - Savoy IL, US
International Classification:
H01R009/05
US Classification:
361/791000
Abstract:
A connector assembly for a radio frequency (RF) signal includes a body, a flange connected to the body and having a cavity, and a plurality of pins extending from the flange, in which the cavity of the flange receives a chip carrier and the pins contact the chip carrier so as to minimize the signal path from the connect pin to the device in the chip carrier.

Semiconductor Die Package Having Mesh Power And Ground Planes

View page
US Patent:
20040222514, Nov 11, 2004
Filed:
Feb 20, 2004
Appl. No.:
10/781848
Inventors:
Stanford Crane - Santa Clara CA, US
Myoung-soo Jeon - Fremont CA, US
Charley Ogata - San Jose CA, US
Ton-Yong Wang - Fremont, CA
Andreas Cangellaris - Champaign IL, US
Jose Schutt-Aine - Savoy IL, US
Assignee:
Silicon Bandwidth, Inc.
International Classification:
H01L023/48
US Classification:
257/697000
Abstract:
A cluster grid array semiconductor die package and mating socket provide electrical connection between one or more semiconductor dies housed within the die package and substrate, such as a printed circuit board, on which the mating socket is mounted. The die package and the mating socket may be easily connected and disconnected. The die package may include power and ground planes built into and distributed within the housing of the die package.
Control profile
Jose E Schutt-Aine from Urbana, IL, age ~65 Get Report