Resumes
Resumes
Staff Verification Engineer At Cypress
View pageLocation:
12481 Jolene Ct, Saratoga, CA 95070
Industry:
Semiconductors
Work:
Cypress Semiconductor Corporation
Staff Verification Engineer at Cypress
Spansion Oct 2012 - Mar 2015
Senior Verification Engineer
Lsi Corporation May 2012 - Oct 2012
Contractor
Staff Verification Engineer at Cypress
Spansion Oct 2012 - Mar 2015
Senior Verification Engineer
Lsi Corporation May 2012 - Oct 2012
Contractor
Education:
University of Southern California 2012
Doctorates, Doctor of Philosophy, Electrical Engineering Sonoma State University 2004
Master of Science, Masters, Engineering University of Tehran 2001
Bachelors, Bachelor of Science, Engineering
Doctorates, Doctor of Philosophy, Electrical Engineering Sonoma State University 2004
Master of Science, Masters, Engineering University of Tehran 2001
Bachelors, Bachelor of Science, Engineering
Skills:
Verilog
System Verilog
Universal Verification Methodology
Functional Verification
Debugging
Code/Functional Coverage
Vlsi
Rtl Design
Radiation Hardening By Design For Memory and Digital Circuits
Cadence Virtuoso
C++
System Verilog
Universal Verification Methodology
Functional Verification
Debugging
Code/Functional Coverage
Vlsi
Rtl Design
Radiation Hardening By Design For Memory and Digital Circuits
Cadence Virtuoso
C++