Resumes
Resumes
Strategic Product Planner
View pageLocation:
San Francisco, CA
Industry:
Semiconductors
Work:
Intel Corporation
Strategic Product Planner
Datawise.io Mar 2015 - Aug 2017
Member of Technical Staff
Tabula Jul 2008 - Mar 2015
Senior Staff Applications Engineer and Technical Lead
Xilinx Jan 2005 - Jun 2008
Fpga Design Engineer
Strategic Product Planner
Datawise.io Mar 2015 - Aug 2017
Member of Technical Staff
Tabula Jul 2008 - Mar 2015
Senior Staff Applications Engineer and Technical Lead
Xilinx Jan 2005 - Jun 2008
Fpga Design Engineer
Education:
Santa Clara University 2002 - 2004
Masters, Electronics Engineering National Institute of Engineering 1996 - 2000
Bachelors, Electronics Engineering
Masters, Electronics Engineering National Institute of Engineering 1996 - 2000
Bachelors, Electronics Engineering
Skills:
Fpga
Verilog
Rtl Design
Asic
Tcl
Integrated Circuit Design
Soc
Vhdl
Rtl Coding
Vlsi
Static Timing Analysis
Xilinx
Semiconductors
Eda
Field Programmable Gate Arrays
Systemverilog
Timing Closure
Very Large Scale Integration
Application Specific Integrated Circuits
Verilog
Rtl Design
Asic
Tcl
Integrated Circuit Design
Soc
Vhdl
Rtl Coding
Vlsi
Static Timing Analysis
Xilinx
Semiconductors
Eda
Field Programmable Gate Arrays
Systemverilog
Timing Closure
Very Large Scale Integration
Application Specific Integrated Circuits