Resumes
Resumes
![Naveen Ramaswamy Photo 1 Naveen Ramaswamy Photo 1](/img/not-found.png)
Micro-Architect -Soc Design
View pageLocation:
19750 northwest Phillips Rd, Hillsboro, OR 97124
Industry:
Semiconductors
Work:
Micro-Architect -Soc Design
Intel Corporation
Clock Domain Crossing Expert In High Speed Design Ip and Soc
Intel Corporation
Senior Hardware Engineer
Intel Corporation
Senior Rtl Design Engineer
Intel Corporation Feb 1, 2013 - 2016
Microarchitect and Rtl Design
Education:
Portland State University 2006 - 2008
Masters, Electronics Engineering, Electronics Anna University 2001 - 2005
Bachelors, Electronics, Engineering, Communications
Masters, Electronics Engineering, Electronics Anna University 2001 - 2005
Bachelors, Electronics, Engineering, Communications
Skills:
Mixed Signal
Static Timing Analysis
Synopsys Tools
Scripting
High Speed Digital Design
Cadence Conformal
Lean Deployment
Multi Clock Design
Peer Mentoring
Systemverilog
Verdi
Silicon Validation
Cadence
Microprocessors
Eda
Static Timing Analysis
Synopsys Tools
Scripting
High Speed Digital Design
Cadence Conformal
Lean Deployment
Multi Clock Design
Peer Mentoring
Systemverilog
Verdi
Silicon Validation
Cadence
Microprocessors
Eda
Languages:
English
Tamil
Tamil