Search

Robert Starkston Phones & Addresses

  • Davis, CA
  • 4155 Victoria St, Chandler, AZ 85226 (602) 345-9927
  • Mesa, AZ
  • 2004 Granite View Dr, Phoenix, AZ 85048 (480) 283-6248
  • Rodeo, CA
  • 2004 E Granite View Dr, Phoenix, AZ 85048 (480) 236-8859

Work

Position: Administrative Support Occupations, Including Clerical Occupations

Education

Degree: High school graduate or higher

Publications

Us Patents

Thermal Performance In Flip Chip/Integral Heat Spreader Packages Using Low Modulus Thermal Interface Material

View page
US Patent:
6617683, Sep 9, 2003
Filed:
Sep 28, 2001
Appl. No.:
09/964709
Inventors:
Vassoudevane Lebonheur - Tempe AZ
Robert Starkston - Phoenix AZ
Assignee:
Intel Corporation - Santan Clara CA
International Classification:
H01L 2334
US Classification:
257707, 257713, 257720, 257783, 438118, 438122
Abstract:
A microprocessor package and a method of dissipating heat therefrom have improved thermal performance by utilizing low modulus thermal interface material between the flip chip, central processing unit and a heat spreader in the package. A modulus of elasticity of the thermal interface material in the kPa range is preferably provided by a cured, filled polymer gel which is lightly crosslinked. The gel thermal interface material enables the package to have a post end-of-line and post reliability testing thermal resistance across the thermal interface material between the flip chip and the heat spreader of 0. 45 cm  C. /Watt. Mitigation of thin film cracking in die and prevention of interfacial delamination upon temperature cycling are also attained.

Marking On Underfill

View page
US Patent:
7015592, Mar 21, 2006
Filed:
Mar 19, 2004
Appl. No.:
10/804801
Inventors:
Robert Starkston - Phoenix AZ, US
Jason Zhang - Gilbert AZ, US
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
H01L 23/29
H01L 21/44
H01L 21/48
H01L 21/50
US Classification:
257787, 257797, 438127
Abstract:
A marking is formed on an underfill between a die and a substrate.

Microelectronic Assembly Having A Thermally Conductive Member With A Cavity To Contain A Portion Of A Thermal Interface Material

View page
US Patent:
7223638, May 29, 2007
Filed:
May 13, 2004
Appl. No.:
10/846722
Inventors:
Robert Starkston - Phoenix AZ, US
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
H01L 21/00
US Classification:
438122, 438118
Abstract:
A thermally conductive member is placed adjacent a microelectronic die with a thermal interface material between the microelectronic die and a wetting layer formed on a surface of the thermally conductive member. The thermal interface material is heated to cause reflow thereof. The first portion of the thermal interface material is directed by the wetting layer into a first cavity formed in the thermally conductive member. The thermal interface material is then allowed to cool and solidify.

Soldering A Die To A Substrate

View page
US Patent:
7332423, Feb 19, 2008
Filed:
Jun 29, 2005
Appl. No.:
11/170188
Inventors:
Robert Starkston - Phoenix AZ, US
Sridhar Narasimhan - Chandler AZ, US
Chia-Pin Chiu - Tempe AZ, US
Suzana Prstic - Chandler AZ, US
Patrick N Stover - Gilbert AZ, US
Hong Xie - Phoenix AZ, US
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
H01L 21/44
US Classification:
438612, 438613, 438615
Abstract:
One example electronic assembly includes a substrate that has a plurality of contacts which become bonded to a plurality of contacts on a die. The electronic assembly further includes a male member that extends from at least one of the substrate and the die and a female member that extends from the other of the substrate and the die. The male member is inserted into the female member to align the die relative to the substrate. The male member and the female member may have any configuration as long as one or more portions of the male member extend partially, or wholly, into the female member. An example method includes aligning a die relative to a substrate by inserting a male member that extends from one of the die and the substrate into a female member that extends from the other of the die and the substrate.

Methods For Laser Scribing Wafers

View page
US Patent:
7772090, Aug 10, 2010
Filed:
Sep 30, 2003
Appl. No.:
10/674960
Inventors:
Robert Starkston - Phoenix AZ, US
Andrew Proctor - Chandler AZ, US
Steve Terry - Glendale AZ, US
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
H01L 21/301
US Classification:
438462, 438463
Abstract:
A method for singulating dies from a wafer includes laser scribing a continuous line on each side of the die, and laser ablating an area adjacent the laser scribed continuous line on each side of the die. The laser ablations in the area adjacent the laser scribed continuous line on each side of the die being spaced from one another. The method also includes sawing the laser abated area adjacent the continuous line. A method for singulating dies from a wafer includes laser scribing a first continuous line, laser scribing a second continuous line spaced apart from the first continuous line, and laser scribing a third continuous line. The third continuous line positioned between the first continuous line and the second continuous line. The third continuous line overlaps the second continuous line and the third continuous line.

Methods And Apparatus For Laser Scribing Wafers

View page
US Patent:
8364304, Jan 29, 2013
Filed:
Jul 14, 2010
Appl. No.:
12/836448
Inventors:
Robert Starkston - Phoenix AZ, US
Andrew Proctor - Chandler AZ, US
Steve Terry - Glendale AZ, US
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
H01L 21/301
H01L 21/304
US Classification:
700166, 264400, 2191216, 483463
Abstract:
A method for singulating dies from a wafer includes laser scribing a continuous line on each side of the die, and laser ablating an area adjacent the laser scribed continuous line on each side of the die. The laser ablations in the area adjacent the laser scribed continuous line on each side of the die being spaced from one another. The method also includes sawing the laser abated area adjacent the continuous line. A method for singulating dies from a wafer includes laser scribing a first continuous line, laser scribing a second continuous line spaced apart from the first continuous line, and laser scribing a third continuous line. The third continuous line positioned between the first continuous line and the second continuous line. The third continuous line overlaps the second continuous line and the third continuous line.

Composition For Removing Sulfides From Industrial Gas

View page
US Patent:
46473971, Mar 3, 1987
Filed:
Apr 29, 1985
Appl. No.:
6/728439
Inventors:
Robert Starkston - San Rafael CA
Mark C. Luce - Vallejo CA
Robert V. Homsy - Orinda CA
Assignee:
Chevron Research Company - San Francisco CA
International Classification:
C09K 300
US Classification:
252189
Abstract:
Process and composition for removing H. sub. 2 S and like sulfides from gas streams by contact with a substituted aromatic nitrile having an electron-attracting substituent on the aromatic ring at least as strong as halogen (e. g. , isophthalonitrile) and an organic tertiary amine in an inert organic solvent such as N-methyl-2-pyrrolidone.

Emi Containment For Microprocessor Core Mounted On A Card Using Surface Mounted Clips

View page
US Patent:
6239973, May 29, 2001
Filed:
Mar 27, 2000
Appl. No.:
9/535424
Inventors:
Scot W. Taylor - Apache Junction AZ
Robert Starkston - Chandler AZ
Charles Gealer - Phoenix AZ
Michael L. Rutigliano - Chandler AZ
Raymond A. Krick - Gilbert AZ
John A. Rabenius - Tempe AZ
Edmond L. Hart - Chandler AZ
Ravi V. Mahajan - Tempe AZ
Farukh Fares - Phoenix AZ
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
H05H 720
US Classification:
361704
Abstract:
An electronic cartridge which includes a cover that is electrically coupled to a substrate by a clip. An integrated circuit package is mounted to the substrate and at least partially enclosed by the cover. The clips and cover may be connected to a ground plane of the substrate. The cover and substrate may create a "shield" about the integrated circuit package so that any electromagnetic field that flows from the package is grounded to the substrate.
Robert N Starkston from Davis, CA, age ~65 Get Report