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Veena S Pureswaran

from Cary, NC
Age ~47
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Also known as:
Veena S Ragupathi
Phone and address:
537 Bolton Grant Dr, Cary, NC 27519
Related to:
Aravind Ragupathi, 50
Connected to:
Munkhzul Purevdorj, 38Ariunbold Purevochir, 53Raelynn K Purewal, 60Sukhninder K Purewal, 76Surinderpal K Purewal, 74Rolando R Purez, 64Soler Pureza, 62Toronda E Pureza, 55Lisa M Purfeerst, 65Matthew J Purfeerst, 32

Veena Pureswaran Phones & Addresses

  • 537 Bolton Grant Dr, Cary, NC 27519
  • 1532 Macalpine Cir, Morrisville, NC 27560 (919) 466-9547
  • Raleigh, NC
  • Amherst, NY
  • Buffalo, NY
  • 7612 Canvas Art Ter, Raleigh, NC 27617 (919) 466-9547

Work

Position: Executive, Administrative, and Managerial Occupations

Education

Degree: High school graduate or higher

Resumes

Resumes

Veena Pureswaran Photo 1

Veena Pureswaran

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Location:
15 Polk Ct, North Potomac, MD 20878
Industry:
Research
Work:
Ibm 2001 - 2008
Design Optimization Engineer at Ibm
Education:
Duke University 2009 - 2010
Duke University - the Fuqua School of Business 2006 - 2008
Master of Business Administration, Masters State University of New York College at Buffalo 1999 - 2001
Master of Science, Masters, Computer Engineering Birla Institute of Technology and Science, Pilani 1995 - 1999
Bachelor of Engineering, Bachelors, Electronics Engineering
Skills:
Business Value
Veena Pureswaran Photo 2

Veena Pureswaran

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Location:
Raleigh-Durham, North Carolina Area
Industry:
Computer Hardware
Veena Pureswaran Photo 3

Design Optimization Engineer At Ibm

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Position:
Design Optimization Engineer at IBM
Location:
Raleigh-Durham, North Carolina Area
Industry:
Computer Hardware
Work:
IBM
Design Optimization Engineer
Education:
Duke University - The Fuqua School of Business 2006 - 2008

Publications

Us Patents

Method Of Minimizing Early-Mode Violations Causing Minimum Impact To A Chip Design

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US Patent:
7996812, Aug 9, 2011
Filed:
Aug 14, 2008
Appl. No.:
12/191435
Inventors:
Pooja M. Kotecha - Beacon NY, US
Frank J. Musante - Poughkeepsie NY, US
Veena S. Pureswaran - Raleigh NC, US
Louise H. Trevillyan - Katonah NY, US
Paul G. Villarrubia - Austin TX, US
Assignee:
International Business Machines Corporation - Armonk NY
International Classification:
G06F 9/455
G06F 17/50
US Classification:
716134, 716106, 716107, 716108, 716111, 716113, 716114
Abstract:
A system and a method for correcting early-mode timing violations that operate across the process space of a circuit design. Optimizations are performed to replace padding that increase path delays on fast paths. At the stage in the design process where early-mode violations are addressed, placement, late-mode timing closure, routing, and detailed electrical and timing analysis are assumed to have been completed. The optimizations are designed to be effective in delaying fast paths while minimizing the impact on already-completed work on the chip, in contrast to relying only on adding pads that can have a negative impact on all of these quantities. The optimizations are classified according to their invasiveness and are followed by their deployment. The deployment is designed to minimize using delay pads, reduce design disruptions, and minimize effects on other aspects of the design.

Power Efficient Cycle Stealing

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US Patent:
20070033427, Feb 8, 2007
Filed:
Jul 19, 2005
Appl. No.:
11/184421
Inventors:
Anthony Correale - Raleigh NC, US
Benjamin Bowers - Cary NC, US
Ying Brown - Cary NC, US
Veena Pureswaran - Morrisville NC, US
Assignee:
International Business Machines Corporation - Armonk NY
International Classification:
G06F 1/00
US Classification:
713500000
Abstract:
Arrangements and methods to cycle steal and reduce power consumption in an integrated circuit are disclosed. Embodiments of the invention exploit the art of cycle stealing for increased system performance, while facilitating a more power efficient bypass mode when power conservation is desired over performance. One embodiment includes a network of integrated delay elements employing a multiplexor to transfer either a normal or a delayed clock signal to a clock splitter. Another embodiment includes a network of delay elements, configured to enable or disable power conservation. A further embodiment integrates a configurable delay circuit into a clock splitter arrangement.

Influence-Based Circuit Design

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US Patent:
20070192752, Aug 16, 2007
Filed:
Feb 15, 2006
Appl. No.:
11/354425
Inventors:
Subhrajit Bhattacharya - White Plains NY, US
Anthony Correale - Raleigh NC, US
Nathaniel Hieter - Clinton Corners NY, US
Veena Pureswaran - Morrisville NC, US
Ruchir Puri - Baldwin Place NY, US
Assignee:
International Business Machines Corporation - Armonk NY
International Classification:
G06F 17/50
US Classification:
716004000
Abstract:
An improved solution for designing a circuit is provided. A set of target paths, each of which has a performance attribute that is targeted for improvement, is obtained from a design for the circuit. An influence for one or more of the nodes in the set of target paths is obtained. One or more of the nodes are selected for improvement using the influence. Subsequently, the performance attribute for each selected node is improved. For example, an implementation of the node can be replaced with an implementation having an improved performance attribute. The relative improvement provided by an alternative implementation versus a relative detriment to another performance attribute can be obtained and used in selecting the node(s) for improvement. In one embodiment, the relative improvement and influence are used to obtain a sensitivity metric for each alternative implementation, which is used in selecting the node(s) for improvement. In this manner, the circuit can be improved in a more effective manner.

Sensor Based Context Augmentation Of Search Queries

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US Patent:
20180052915, Feb 22, 2018
Filed:
Aug 22, 2016
Appl. No.:
15/243729
Inventors:
- ARMONK NY, US
Joseph N. Kozhaya - Research Triangle Park NC, US
Veena S. Pureswaran - Research Triangle Park NC, US
International Classification:
G06F 17/30
G06N 99/00
G06N 7/00
Abstract:
A computing device comprising a processor configured to receive a natural language search query and determine a first response to the natural language search query, the first response having a first confidence level. The processor is further configured to determine a sensor class effecting an information gain on the natural language search query according to a table of training data. The processor is further configured to augment the natural language search query to form an augmented search query according to data received from at least one sensor that is a member of the sensor class and determine a second response to the augmented search query, the second response having a second confidence level. The processor is further configured to store information to the table of training data that associates the at least one sensor with a value of a change between the first confidence level and the second confidence level.

Sensor Based Context Augmentation Of Search Queries

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US Patent:
20180052925, Feb 22, 2018
Filed:
Aug 22, 2016
Appl. No.:
15/243721
Inventors:
- Armonk NY, US
Joseph N. Kozhaya - Research Triangle Park NC, US
Veena S. Pureswaran - Research Triangle Park NC, US
International Classification:
G06F 17/30
Abstract:
A computing device and method is usable to augment search queries with data obtained from sensors. The computing device comprises a processor configured to receive, from a query source, a search query comprising a query concept. The processor is further configured to determine a context of the query concept expressed in the query. The processor is further configured to determine a response to the query. The processor is further configured to validate the context of the query using at least one sensor. The processor is further configured to transmit the response to the query to the query source.

Device Self-Servicing In An Autonomous Decentralized Peer-To-Peer Environment

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US Patent:
20180007131, Jan 4, 2018
Filed:
Jun 30, 2016
Appl. No.:
15/198764
Inventors:
- Armonk NY, US
Sumabala P. Nair - Johns Creek GA, US
Sanjay B. Panikkar - Bangalore, IN
Veena S. Pureswaran - Raleigh NC, US
International Classification:
H04L 29/08
H04L 12/24
Abstract:
An approach, for autonomous self-servicing of decentralized peer-to-peer devices in an autonomous decentralized peer-to-peer telemetry (ADEPT) environment. A first ADEPT peer connects to ADEPT peers based on peer consensus. The first ADEPT peer determines service needs based on receiving diagnostic inputs. The first ADEPT peer identifies service providers based on consensus service contracts associated to the service needs. The first ADEPT peer creates service orders based on the service providers and output the service orders to service providers based on the consensus service contracts.

Autonomous Decentralized Peer-To-Peer Telemetry

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US Patent:
20170310747, Oct 26, 2017
Filed:
Apr 26, 2016
Appl. No.:
15/138619
Inventors:
- Armonk NY, US
Peter G. Finn - Markham, CA
Sumabala P. Nair - Johns Creek GA, US
Sanjay B. Panikkar - Bangalore, IN
Veena S. Pureswaran - Raleigh NC, US
International Classification:
H04L 29/08
G06Q 20/36
G06Q 30/06
H04L 29/08
Abstract:
An approach for enabling autonomous decentralized peer-to-peer telemetry (ADEPT). A first ADEPT peer senses ADEPT peers to interconnect where the ADEPT peers are identified as ADEPT light peer, ADEPT standard peer and ADEPT peer exchange based on respectively increasing IoT device capability. The first ADEPT peer sends and receives requests to interconnect to the ADEPT peers based on messaging. The first ADEPT peer transfers files where the files are distributed toward peer-to-peer networks, creating peer consensus and interconnecting the first ADEPT peer to the ADEPT peers based on the peer consensus. ADEPT peers execute transactions and contracts by decentralized peer to peer consensus network and consensus ledger to enable autonomous device coordination.
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Veena S Pureswaran from Cary, NC, age ~47 Get Report