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William Thomas Rericha

from Boise, ID
Age ~66
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Also known as:
William T Rericha, William Thoma Rericha, Thomas W Rericha, Willam T Rericha, Rerich T William, William T Rerich
Phone and address:
3223 S White Fir Pl, Boise, ID 83716
Related to:
David A Cathey, 63Pamela Jill Cathey, 58Jeanette C Newbold, 59James Cathey, 35Ashlie L Cathey, 36Dorothy A Rericha, 59Yvonne J Rericha, 30James J Cathey, 60Robin L Cathey, 58
Connected to:
Debbie M Rerich, 65Herbert L Rerich, 95Kimberly S Rerich, 50Pavel Rericha, 51Carolyn A Rerick, 78David A Rericka, 58Linda J Rerick, 78Michael T Rerick, 47Dorothy E Rerig, 83Laurie A Rerko, 56

William Rericha Phones & Addresses

  • 3223 S White Fir Pl, Boise, ID 83716
  • 3026 Bogus Basin Rd, Boise, ID 83702 (208) 344-9058
  • Bristow, VA
  • Albany, LA
  • Prince William, VA

Work

Company: Micron technology Position: Engineer

Industries

Semiconductors

Resumes

Resumes

William Rericha Photo 1

Engineer

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Location:
Boise, ID
Industry:
Semiconductors
Work:
Micron Technology
Engineer

Publications

Us Patents

Method And Apparatus For Irradiating A Microlithographic Substrate

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US Patent:
6784975, Aug 31, 2004
Filed:
Aug 30, 2001
Appl. No.:
09/945167
Inventors:
Ulrich C. Boettiger - Boise ID
Scott L. Light - Boise ID
William T. Rericha - Boise ID
Craig A. Hickman - Meridian ID
Assignee:
Micron Technology, Inc. - Boise ID
International Classification:
G03B 2742
US Classification:
355 53, 355 67, 355 77
Abstract:
A method and apparatus for exposing a radiation-sensitive material of a microlithographic substrate to a selected radiation. The method can include directing the radiation along a radiation path in a first direction toward a reticle, passing the radiation from the reticle and to the microlithographic substrate along the radiation path in a second direction, and moving the reticle relative to the radiation path along a reticle path generally normal to the first direction. The microlithographic substrate can move relative to the radiation path along a substrate path having a first component generally parallel to the second direction, and a second component generally perpendicular to the second direction. The microlithographic substrate can move generally parallel to and generally perpendicular to the second direction in a periodic manner while the reticle moves along the reticle path to change a relative position of a focal plane of the radiation.

Method And Apparatus For Irradiating A Microlithographic Substrate

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US Patent:
7038762, May 2, 2006
Filed:
Jul 28, 2004
Appl. No.:
10/901852
Inventors:
Ulrich C. Boettiger - Boise ID, US
Scott L. Light - Boise ID, US
William T. Rericha - Boise ID, US
Craig A. Hickman - Meridian ID, US
Assignee:
Micron Technology, Inc. - Boise ID
International Classification:
G03B 27/42
G03B 27/52
G03B 27/62
G03B 27/32
G03C 5/00
US Classification:
355 53, 355 55, 355 75, 355 77, 430311
Abstract:
A method and apparatus for exposing a radiation-sensitive material of a microlithographic substrate to a selected radiation. The method can include directing the radiation along a radiation path in a first direction toward a reticle, passing the radiation from the reticle and to the microlithographic substrate along the radiation path in a second direction, and moving the reticle relative to the radiation path along a reticle path generally normal to the first direction. The microlithographic substrate can move relative to the radiation path along a substrate path having a first component generally parallel to the second direction, and a second component generally perpendicular to the second direction. The microlithographic substrate can move generally parallel to and generally perpendicular to the second direction in a periodic manner while the reticle moves along the reticle path to change a relative position of a focal plane of the radiation.

Method For Integrated Circuit Fabrication Using Pitch Multiplication

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US Patent:
7115525, Oct 3, 2006
Filed:
Sep 2, 2004
Appl. No.:
10/934778
Inventors:
Mirzafer K. Abatchev - Boise ID, US
Gurtej Sandhu - Boise ID, US
Luan Tran - Meridian ID, US
William T. Rericha - Boise ID, US
D. Mark Durcan - Boise ID, US
Assignee:
Micron Technology, Inc. - Boise ID
International Classification:
H01L 21/302
H01L 21/461
US Classification:
438725, 438709, 438689, 257E21024, 257E21032
Abstract:
Different sized features in the array and in the periphery of an integrated circuit are patterned on a substrate in a single step. In particular, a mixed pattern, combining two separately formed patterns, is formed on a single mask layer and then transferred to the underlying substrate. The first of the separately formed patterns is formed by pitch multiplication and the second of the separately formed patterns is formed by conventional photolithography. The first of the separately formed patterns includes lines that are below the resolution of the photolithographic process used to form the second of the separately formed patterns. These lines are made by forming a pattern on photoresist and then etching that pattern into an amorphous carbon layer. Sidewall pacers having widths less than the widths of the un-etched parts of the amorphous carbon are formed on the sidewalls of the amorphous carbon. The amorphous carbon is then removed, leaving behind the sidewall spacers as a mask pattern.

Pitch Reduced Patterns Relative To Photolithography Features

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US Patent:
7253118, Aug 7, 2007
Filed:
Aug 29, 2005
Appl. No.:
11/214544
Inventors:
Luan Tran - Meridian ID, US
William T. Rericha - Boise ID, US
John Lee - Boise ID, US
Raman Alapati - Boise ID, US
Sheron Honarkhah - Boise ID, US
Shuang Meng - Boise ID, US
Puneet Sharma - Ames IA, US
Jingyi (Jenny) Bai - San Jose CA, US
Zhiping Yin - Boise ID, US
Paul Morgan - Kuna ID, US
Mirzafer K. Abatchev - Boise ID, US
Gurtej S. Sandhu - Boise ID, US
D. Mark Durcan - Boise ID, US
Assignee:
Micron Technology, Inc. - Boise ID
International Classification:
H01L 21/302
US Classification:
438717, 438725, 257E2125
Abstract:
Differently-sized features of an integrated circuit are formed by etching a substrate using a mask which is formed by combining two separately formed patterns. Pitch multiplication is used to form the relatively small features of the first pattern and conventional photolithography used to form the relatively large features of the second pattern. Pitch multiplication is accomplished by patterning a photoresist and then etching that pattern into an amorphous carbon layer. Sidewall spacers are then formed on the sidewalls of the amorphous carbon. The amorphous carbon is removed, leaving behind the sidewall spacers, which define the first mask pattern. A bottom anti-reflective coating (BARC) is then deposited around the spacers to form a planar surface and a photoresist layer is formed over the BARC. The photoresist is next patterned by conventional photolithography to form the second pattern, which is then is transferred to the BARC. The combined pattern made out by the first pattern and the second pattern is transferred to an underlying amorphous silicon layer and the pattern is subjected to a carbon strip to remove BARC and photoresist material.

Method And Apparatus For Irradiating A Microlithographic Substrate

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US Patent:
7298453, Nov 20, 2007
Filed:
Mar 17, 2006
Appl. No.:
11/378666
Inventors:
Ulrich C. Boettiger - Boise ID, US
Scott L. Light - Boise ID, US
William T. Rericha - Boise ID, US
Craig A. Hickman - Meridian ID, US
Assignee:
Micron Technology, Inc. - Boise ID
International Classification:
G03B 27/42
G03B 27/54
G03B 27/32
US Classification:
355 53, 355 67, 355 77
Abstract:
A method and apparatus for exposing a radiation-sensitive material of a microlithographic substrate to a selected radiation. The method can include directing the radiation along a radiation path in a first direction toward a reticle, passing the radiation from the reticle and to the microlithographic substrate along the radiation path in a second direction, and moving the reticle relative to the radiation path along a reticle path generally normal to the first direction. The microlithographic substrate can move relative to the radiation path along a substrate path having a first component generally parallel to the second direction, and a second component generally perpendicular to the second direction. The microlithographic substrate can move generally parallel to and generally perpendicular to the second direction in a periodic manner while the reticle moves along the reticle path to change a relative position of a focal plane of the radiation.

Method To Align Mask Patterns

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US Patent:
7435536, Oct 14, 2008
Filed:
Jun 20, 2006
Appl. No.:
11/472130
Inventors:
Gurtej S. Sandhu - Boise ID, US
Randal W. Chance - Boise ID, US
William T. Rericha - Boise ID, US
Assignee:
Micron Technology, Inc. - Boise ID
International Classification:
G03F 7/26
G03F 7/00
US Classification:
430313, 430311, 430312, 430314, 430326, 438696, 438950, 438975
Abstract:
Alignment tolerances between narrow mask lines, for forming interconnects in the array region of an integrated circuit, and wider mask lines, for forming interconnects in the periphery of the integrated circuit, are increased. The narrow mask lines are formed by pitch multiplication and the wider mask lines are formed by photolithography. The wider mask lines and are aligned so that one side of those lines is flush with or inset from a corresponding side of the narrow lines. Being wider, the opposite sides of the wider mask lines protrude beyond the corresponding opposite sides of the narrow mask lines. The wider mask lines are formed in negative photoresist having a height less than the height of the narrow mask lines. Advantageously, the narrow mask lines can prevent expansion of the mask lines in one direction, thus increasing alignment tolerances in that direction. In the other direction, use of photolithography and a shadowing effect caused by the relative heights of the photoresist and the narrow mask lines causes the wider mask lines to be formed with a rounded corner, thus increasing alignment tolerances in that direction by increasing the distance to a neighboring narrow mask line.

Method To Align Mask Patterns

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US Patent:
7455956, Nov 25, 2008
Filed:
Mar 26, 2007
Appl. No.:
11/691192
Inventors:
Gurtej S Sandhu - Boise ID, US
Randal W Chance - Boise ID, US
William T Rericha - Boise ID, US
Assignee:
Micron Technology, Inc. - Boise ID
International Classification:
G03F 7/00
B44C 1/22
H01L 21/469
US Classification:
430313, 430311, 430314, 430322, 430323, 216 41, 216 46, 438975
Abstract:
Alignment tolerances between narrow mask lines, for forming interconnects in the array region of an integrated circuit, and wider mask lines, for forming interconnects in the periphery of the integrated circuit, are increased. The narrow mask lines are formed by pitch multiplication and the wider mask lines are formed by photolithography. The wider mask lines and are aligned so that one side of those lines is flush with or inset from a corresponding side of the narrow lines. Being wider, the opposite sides of the wider mask lines protrude beyond the corresponding opposite sides of the narrow mask lines. The wider mask lines are formed in negative photoresist having a height less than the height of the narrow mask lines. Advantageously, the narrow mask lines can prevent expansion of the mask lines in one direction, thus increasing alignment tolerances in that direction. In the other direction, use of photolithography and a shadowing effect caused by the relative heights of the photoresist and the narrow mask lines causes the wider mask lines to be formed with a rounded corner, thus increasing alignment tolerances in that direction by increasing the distance to a neighboring narrow mask line.

Method For Integrated Circuit Fabrication Using Pitch Multiplication

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US Patent:
7547640, Jun 16, 2009
Filed:
Jul 24, 2006
Appl. No.:
11/492323
Inventors:
Mirzafer K. Abatchev - Boise ID, US
Gurtej Sandhu - Boise ID, US
Luan Tran - Meridian ID, US
William T. Rericha - Boise ID, US
D. Mark Durcan - Boise ID, US
Assignee:
Micron Technology, Inc. - Boise ID
International Classification:
H01L 21/302
H01L 21/461
US Classification:
438736, 438738, 438947, 257E2149, 257E21582
Abstract:
Different sized features in the array and in the periphery of an integrated circuit are patterned on a substrate in a single step. In particular, a mixed pattern, combining two separately formed patterns, is formed on a single mask layer and then transferred to the underlying substrate. The first of the separately formed patterns is formed by pitch multiplication and the second of the separately formed patterns is formed by conventional photolithography. The first of the separately formed patterns includes lines that are below the resolution of the photolithographic process used to form the second of the separately formed patterns. These lines are made by forming a pattern on photoresist and then etching that pattern into an amorphous carbon layer. Sidewall pacers having widths less than the widths of the un-etched parts of the amorphous carbon are formed on the sidewalls of the amorphous carbon. The amorphous carbon is then removed, leaving behind the sidewall spacers as a mask pattern.
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William Thomas Rericha from Boise, ID, age ~66 Get Report